Normally-off trench JFET technology in 4H silicon carbide

Abstract

A double gate normally-off silicon carbide (SiC) trench junction field effect transistors (JFET) design is considered. Innovative migration enhanced embedded epitaxial (ME 3) growth process was developed to replace the implantation process and realize high device performance. Strong anisotropic behavior in electrical characteristics of the pn junction fabricated on (1 1 −2 0) and (1 −1 0 0) trench a-planes was observed, although quality of the pn diodes was found to be independent of trench plane orientations. Fabricated normally-off trench 4H-SiC JFET demonstrates the potential for lower specific on-resistance ( R onS) in the range of 5–10 mΩ cm 2 (1200 V class). A relative high T −2.6 dependence of R onS is observed. A breakdown voltage of 400 V in the avalanche mode was confirmed at zero gate bias conditions for cell design without edge termination. It was demonstrated that the normally-off JFETs are suitable for high temperature applications. Average temperature coefficient of threshold voltage ( V th) was calculated as −1.8 mV/°C, which is close to the MOS based Si power devices.