Non-scan design for testability for synchronous sequential circuits based on conflict analysis

Abstract

A non-scan design for testability method is presented for synchronous sequential circuits. A testability measure called conflict based on conflict analysis in the process of synchronous sequential circuit test generation is introduced. Reconvergent fanouts with nonuniform inversion parity are still the main cause of redundancy and backtracking in the process of sequential circuit test generation. A new concept called sequential depth for testability is introduced to calculate the conflict-analysis-based testability measure. Potential conflicts between fault effect activation and fault effect propagation are also checked because they are closely related. The testability measure implies the number of potential conflicts to occur or the number of clock cycles required to detect a fault. The non-scan design for testability method based on the conflict measure can reduce many potential backtracks, make many hard-to-detect faults easy-to-detect and many redundant faults testable, therefore, can enhance fault coverage of the circuit greatly. It is believed that non-scan design for testability using the conflict measure can improve the actual testability of a circuit. Extensive experimental results are presented to demonstrate the effectiveness of the method.