Abstract

Electronic devices based on two-dimensional (2D) materials have extended their applications to non-volatile flash memory devices. The gate stack is a key structure in flash memory devices, and the conventional silicon-oxide-nitride-oxide-silicon (SONOS) structure has been widely applied. In this study, we propose a van der Waals (vdW) gate stack based on graphene, molybdenum disulfide (MoS2), and hexagonal boron nitride (hBN) for next-generation flash memory devices. Owing to the bandgap tunability of hBN by functionalization, hBN is capable of forming a tunneling layer, charge trap layer, and blocking layer with different bandgaps, resulting in a suitable energy band offset for program/erase operations and charge storage. This study on the vdW gate stack of MoS2/tunneling hBN/charge trap hBN/blocking hBN/graphene was carried out through technology computer-aided design (TCAD) simulation. The trapped charge density and threshold voltage (Vth) shift were investigated for different bandgaps of the hBN layers. Moreover, the pulse width and cycle were varied to reveal the charge-trapping behavior for further applications.

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