Abstract

This brief presents an evaluation tool of the noise figure reduction that can be achieved by adding a low-noise amplifier in a near- $f_{\max}$ frequency receiver. After choosing a suitable topology and assessing its frequency dependence, an analytical derivation is carried out and preliminary frequency constraints are found. The analytical assessment is followed by a practical example using the CMOS 65-nm technology as a reference for millimeter-wave technologies, where $f_{\max}=234 \text{GHz}$ .

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