Noise and reliability in advanced CMOS devices for low power applications

Abstract

This tutorial will discuss on low-frequency noise and reliability related issues in MOSFETs used for low-power applications. The first part of the tutorial will first direct the readers to understand flicker noise and random telegraph signals from a basic fundamental science perspective. The flicker and RTS noise will be dealt from a circuit perspective with some real-time examples. CMOS scaling requirements for technology and the effects of device scaling on low frequency noise will be discussed.The second part of the tutorial will then discuss about the relationship between reliability and flicker noise followed by effects of various different types of stress on flicker noise. The effect of (a) gate voltage and current stress, (b) channel hot carrier (CHC), (c) time dependent dielectric breakdown (TDDB) and (d) negative bias temperature instabilities (NBTI) on flicker noise will be covered. The effects of radiation hardness on low-frequency noise will also be discussed.The tutorial concludes with various techniques that would help device and circuit designers on reducing flicker noise at process and device level. Also phase noise reduction techniques at circuit level will be dealt with.