NOCHI: Network-on-Chip with Hybrid Interconnect

Abstract

As processor core counts increase, networks-on-chip (NoCs) are becoming an increasingly popular interconnection fabric due to their ability to supply high bandwidth. However, NoCs need to deliver this high bandwidth at low latencies, while keeping within a tight power envelope. In this paper, we present a novel NoC with hybrid interconnect that leverages multiple types of interconnects - –specically, conventional full-swing short-range wires for the datapath, in conjunction with low-swing, multi-drop wires with long range, ultra-low-latency communication for the flow control signals. We show how this proposed system can be used to overcome key limitations of express virtual channels (EVC), a recently proposed flow control technique that allows packets to bypass intermediate routers to simultaneously improve energy-delay-throughput. Our preliminary results show up to a 8.8% reduction in power and up to a 44% improvement in latency under heavy load compared to the original EVC design that only uses the conventional full-swing interconnects.