Abstract

The general-purpose PreAmplifier–DIscriminator application-specific integrated circuit (ASIC) chip, PADI, was originally designed to be used as front-end electronics (FEE) for reading out the timing resistive plate chambers in the time-of-flight (TOF) wall of the compressed baryonic matter (CBM) experiment of the future Facility for Antiproton and Ion Research (FAIR) facility in Darmstadt, Germany. Here, we present the last models of this 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS technology—PADI-X, PADI-XI, and PADI-XII—as well as their key features and test results. While the PADI series was originally developed for high-energy physics experiments carried out at ground facilities, it turned out that PADI is also suitable for space experiments and PADI-X was selected for one sensor of the European Space Agency, JUpiter ICy moons Explore (JUICE) mission. Currently, the most recent model of the series, PADI-XII, has been tuned for space applications and the prototype batch is currently under production.

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