Abstract
Abstract With regard to the International Technology Roadmap for Semiconductors, a minimum MOS transistor channel length of 20–22 nm is predicted. Although the resolution of optical lithography continually increases, to date there exists no known and proven solutions for structure sizes below 100 nm. In this paper a new method for fabrication of extremely small MOS transistors down to W =25 nm and L =25 nm with low demands to the used lithography is presented. The used technique is easily transferable to almost any other technology line and results in an excellent homogeneity and reproducibility of the generated structure size.
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