Abstract
The basic structure is based on merging three devices in an area of a single MOS transistor. It uses an MOS capacitor and bipolar and JFET transistors for storage, writing, and sensing, respectively. These circuit structures have significantly smaller area and faster speed of operation compared to the conventional dynamic logic and memory circuits. In dynamic serial memory, the area of the circuit structure is approximately 35% that of the conventional circuit. The circuit structures also do not suffer from the common problem of charge redistribution.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
