New designs of fault-tolerant adders in quantum-dot cellular automata

Abstract

Quantum-dot cellular automata (QCA) technology has attracted attention as one of the best forms of alternative Nanoscale CMOS technology. It has facilitated the designing of digital circuits with high density and speed. One of the important issues in QCA technology is designing fault-tolerant digital circuits. QCA-based circuits frequently suffer from fabrication and unstable faults: these make them unreliable and susceptible to breakdown. In this paper, two new fault-tolerant 3-input majority gates have been proposed in QCA technology. The robustness of the proposed structures has been evaluated in terms of defects such as cell omission, deposition of extra cell and cell displacement defects. The simulations were performed using the QCA Designer 2.0.03 and QCAPro tools to measure performance and energy consumption. The obtained results indicate that the proposed structures benefit from higher fault-tolerant in comparison to previous designs. Moreover, we provided four new fault-tolerant full-adders and a multi-bit adder using the proposed structures and acceptable results are archived.