Abstract
This paper presents a perspective on CAD tools and IP blocks for System On Chip (SOC). It is based on experience gained in a leading semiconductor manufacturer - STMicroelectronics - where technical and organizational factors intertwine to give a complex working environment. Having set the industrial context we identify key issues related to CAD and IP, based on project post-mortem results and IP reuse training feedback. The issues raised are IP predictability, speed of IP integration, IP quality, Functional Verification and Project Management. We then describe and discuss emerging solutions in each of these areas, and our experience in implementation and deployment. The analysis is then extended to consider the recently introduced paradigm of Platform-Based Design. In this context, techniques for architectural analysis and a comprehensive On Chip Bus infrastructure become critical. Our experience and current activities in these two areas are briefly described. Finally, a number of objectives for future CAD and IP development are proposed.
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