Abstract
Neutrons from a reactor and from a cyclotron have been used to characterise the CMS Resistive Plate Chambers (RPCs) front-end chip to neutron-induced damaging events. Single Event Upset (SEU) cross-sections have been measured up to 60 MeV for different chip thresholds. Tests at a reactor were done with an integrated fast ( E n >3 MeV ) neutron fluence of 1.7×10 10 cm −2 and a thermal neutron fluence of 9.5×10 11 cm −2 . High-energy neutrons from a cyclotron were used up to a fluence of 10 12 cm −2 . Data indicate the existence of a chip SEU sensitivity already at thermal energy and a saturated SEU cross-section from 3 to 60 MeV . Values of the SEU cross-sections from the thermal run well agree with those obtained by another CMS group that uses the same technology ( 0.8 μm BiCMOS) though with different architecture. Cross-sections obtained with fast neutrons (from 3 MeV to about 10 MeV ) are consistently higher by one order of magnitude compared to the thermal one. The average time between consecutive SEU events in each chip of the CMS barrel RPCs can be estimated to be 1 h .
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.