Abstract

This paper presents a multidisciplinary experiment where a population of neurons, dissociated from rat hippocampi, has been cultivated over a CMOS-based micro-electrode array (MEA) and its electrical activity has been detected and mapped by an advanced spike-sorting algorithm implemented on FPGA. MEAs are characterized by low signal-to-noise ratios caused by both the contactless sensing of weak extracellular voltages and the high noise power coming from cells and analog electronics signal processing. This low SNR forces to utilize advanced noise rejection algorithms to separate relevant neural activity from noise, which are usually implemented via software/off-line. However, off-line detection of neural spikes cannot be obviously used for real-time electrical stimulation. In this scenario, this paper presents a proper FPGA-based system capable to detect in real-time neural spikes from background noise. The output signals of the proposed system provide real-time spatial and temporal information about the culture electrical activity and the noise power distribution with a minimum latency of 165 ns. The output bit-stream can be further utilized to detect synchronous activity within the neural network.

Highlights

  • The communication between neurons is carried out through action potentials (AP), transient changes of a trans-membrane voltage of about 100 mVPP and few kHz bandwidth

  • This paper presents the design of a complete FPGA-based digital circuit that monitors the electrical

  • This paper presents theneuronal design cells of a culture complete digital circuit monitors activity of a hippocampal overFPGA-based a micro-electrode array and that detects action the potentials fromof background noise

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Summary

Introduction

The communication between neurons is carried out through action potentials (AP), transient changes of a trans-membrane voltage of about 100 mVPP and few kHz bandwidth. For this reason, recorded signals are typically improved by advanced post-processing spike sorting algorithms that separate relevant neural spikes (deterministic events) from background noise (random fluctuations), even in presence of very low SNR [9,11]. They deeply analyze the Electronics 2018, 7, 392 behavior of neurons populations [11], whereas a complete digital processing hardware implementation is needed to apply event-driven electrical stimulation techniques

Neural
NeuronalCell
Neural Interface Noise
Principal
FPGA Neural Spike Digital Detector
Input Buffer Data Management
Action Potential Detector Algorithm
Action
Output
APD FPGA Hardware Implementation
APD Control Unit Pipeline Approach
Experimental Results
Behavioral
Action Potential Bursting
Conclusions
Methods
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