Abstract
Adaptive computing systems (ACSs) are flexible hardware accelerators for applications in domains such as image and digital signal processing. However, the mapping of applications onto ACSs using the traditional methods can take long time for a hardware engineer to develop and debug. A software design environment called CHAMPION was developed at the University of Tennessee to enable the automated mapping of applications onto ACSs. In this paper the compilation path of CHAMPION is described and a new recursive partitioning method based on topological ordering and levelization (RPL) is presented. The proposed method performs multi-FPGA partitioning by taking into account six different partitioning constraints.
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