Abstract

As the feature size of NAND flash memory decreases, multi-level cell (MLC) technique is emerging to dramatically increase the storage density. In such scenarios, the cell-to-cell interference (CCI) arising from parasitic coupling-capacitance between adjacent cells becomes more severe, which will significantly distort the threshold voltage and deteriorate the data-storage reliability. In this paper, through analyzing the characteristics of threshold voltage distribution of low-density parity-check (LDPC) code MLC NAND flash memory, a post-processing detection scheme is proposed to mitigate the CCI. The proposed scheme utilizes both the neighbor-cell information and the neighbor-a-priori information, and thus is referred to as the Mixed-NCI detector. A salient feature of the proposed detection scheme is that it can acquire very accurate read-back voltages by exploiting the neighbor-cell information of the successfully decoded cells. Analyses and simulation results show that the proposed Mixed-NCI detector achieves remarkable performance gains compared with the state-of-the-art counterparts. The above advantage makes the Mixed-NCI detector extremely attractive for MLC NAND flash memory.

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