Performance of the modified SRBI-MLGD algorithm for LDPC codes in MLC NAND flash memory

Abstract

With continued scaling down of the NAND flash memory, the multi-level cell (MLC) technique emerges to dramatically increase the storage density. Meanwhile, this technique also leads to worse error performance owing to the cell-to-cell interference (CCI). Recently, low-density parity-check (LDPC) code has appeared to be a promising solution to combat the performance degradation of NAND flash memory. Although LDPC codes can provide stronger error performance, the conventional belief propagation (BP) decoding algorithm requires calculating soft-decision log-likelihood (LLR) information and hence possesses a massive computational complexity. In this paper, by exploiting the characteristics of MLC NAND flash memory channels, we present a modified soft reliability-based iterative majority-logic decoding (SRBI-MLGD) algorithm for the LDPC codes over MLC NAND flash memory channels. The modified decoding algorithm has less computational complexity as compared with the sum-product decoding algorithm (SPA). Moreover, the simulation results show that the decoding algorithm offers an effective trade-off between complexity and performance over high-column-weight LDPC coded MLC NAND flash memory channels.