NBTI Study on PMOS Devices with TiN/HfO2 Gate Stack and Process Induced Strain

Abstract

We investigate the effect of process induced strain on Negative Bias Temperature Instability (NBTI) for devices with TiN/HfO2 gate stacks. Devices with compressive Contact Etch Stop Layer (CESL), SiGe Source/Drain, and devices with a combination of both SiGe and CESL were studied and compared to reference devices. We decouple the effect of processing conditions in order to assure correct interpretation of the results. Our study demonstrates that, when initial threshold voltage differences are taken into account and comparisons are performed at the same oxide electric field, no significant degradation of intrinsic NBTI behavior is found for devices with process induced strain. In addition, we performed an Arrhenius study showing that Si-H bonds under strain exhibit similar activation energies as Si-H bonds without strain, indicating that no favorable conditions for interface states generation are created by the strain.