Native Oxide as an Unavoidable Factor Affecting Room-Temperature Electric Field-Induced Characteristics of Device-Quality Silicon

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There is no needing emphasize about the importance of silicon (Si) as a material of choice for almost all fields of the new nanoand microelectronics. Due to its unique structural and physical properties, polycrystalline Si seems to be of special interest as a base for creating so-called 3D-integrated circuits. Various studies have established the main processes of carrier transport in the structures based on this material. In particular, it was shown that tunneling and diffusion recombination processes dominate under room temperature and applied low electric fields. Nevertheless, the analysis and numerical simulation of the experimental data do not always take into account the finite dimensions of the investigated structure and the appearance of carrier depletion as an important component of the tunneling current observed experimentally. Besides that, the fabrication of any device based on polycrystalline Si requires high-temperature treatment. Therefore, the effect of such a treatment on the electric properties of polycrystalline, amorphous and monocrystalline Si is also seemed to be important. Regardless of the huge number of publications describing numerous characteristics of the material and structures based on polycrystalline Si of various types of conductivity, the question about room temperature carrier depletion (exclusion from the contact regions) in polycrystalline material is still open. As is known, native oxides of about 5-10 nm thickness are formed on surfaces after finishing growth of semiconductor bulk materials or deposition (by molecular beam epitaxy, modified liquid phase epitaxy, laser ablation, high-temperature treatment, etc.) of thin films immediately after excluding the samples from the technological chamber. These ultrathin layers form additional potential barriers which can sufficiently affect the performance of active elements. This chapter reports experimental data resulted from the investigations of room-temperature current-voltage (IVC) and capacitance-voltage (CVC) characteristics performed on amorphous silicon thin films fabricated by the magnetron sputtering technique and bulk crystalline silicon of device quality grown by Czochralsky method. The low-resistive contact pads were placed on front and faceplate surfaces of the samples. Studies of room-temperature electric field-