Nanotopography impact in shallow-trench isolation chemical mechanical polishing—analysis method and consumable dependence

Abstract

The nanotopography of the surface of silicon wafers has become an important issue in ULSI device manufacturing, as it affects the post–chemical mechanical polishing (post-CMP) uniformity of the thickness deviation of dielectric films. A spectral method is proposed to examine quantitatively how the nanotopography impacts the film thickness deviation during CMP. The nanotopography impact was investigated in terms of its dependence on the characteristics of consumables, such as the polishing pad hardness and the wafer manufacturing method. In addition, the effects of the surfactant and the abrasive size in ceria slurry on nanotopography impact were investigated. It was found that the magnitude of the post-CMP oxide thickness deviation due to nanotopography increased with the surfactant concentration in the case of smaller abrasives but was almost independent of the concentration in the case of larger abrasives. These results demonstrate that the nanotopography impact can be controlled by manipulating the slurry characteristics.