Nanotechnology Investigation of Ultra-shallow Junctions of Antimony (Sb) Implants in Conventional Silicon (Si)

Abstract

The sheet resistance of the doped region in ultra-shallow junctions is critical to the speed of non-strained engineered integrated circuits. Maintaining low sheet resistance for antimony Sb implanted in Si is a difficult challenge to meet the performance requirements of future Complementary Metal Oxide Semiconductor devices (CMOS). A developed Differential Hall Measurements (DHM) is utilized to measure the dopant carrier concentration profile matches with the atomic profile measured by Secondary Ion Mass Spectroscopy (SIMS) for electrical characterization of the formed ultra-shallow junction. Present results show that decreasing the ion implant energy as 40 keV, 12 keV, 5 keV and 2 keV for the given implant dose under rapid thermal annealing (RTA) in the range from 600°C to 1100°C for 10s, results in an increase in sheet resistance from ~200 Ω/sq to ~850 Ω/sq with reduction in electrical activation percentage from ~90% to ~30%. Also the conductivity mobility decreases with implant energy while increases with annealing temperature. This reduction in electrical activation is due to reduction in junction depth from 60 nm at 40 keV to 17 nm at 2 keV accompanied with higher peak Sb concentration (≥ 2 × 1020 cm-3) as implant energy decreases for annealing temperature less than 800°C for 10s. Higher annealing temperature (i.e. > 800°C) does not improve the electrical activation while increases the sheet resistance due to the out diffusion of Sb from the active region. The best results that nearly satisfying industrial ITRS requirements corresponds to the following parameters: 5 keV implant energy with sheet resistance 400 Ω/sq, electrical activation 60%, conductivity mobility 50 cm2/Vs, peak Sb concentration of 4 × 1020 cm-3 and junction depth 22 nm.