Nanometer Scale Electronic Device Integration Using Side-Wall Deposition and Etch-Back Technology

Abstract

Side-wall deposition and etch-back technology is a cheap method to produce nanometer scale lines and trenches or gaps without expensive equipment like high resolution lithography or chemical-mechanical polishing. It can be used forgratingsinintegratedopticsandinsemiconductortechnologyforelectronic deviceintegration.Thispaperreflectsitsapplicationforfieldeffecttransistors in bulk silicon and demonstrates its potential for nanometer scale particle transistor integration. Silicon and ZnO nanoparticle field effect transistors using different setup structures integrated by side-wall deposition and etchback show on/off ratios of up to 4500 and mobilities up to some cm 2 V −1 s −1 . Although the best structures apply high temperature processing, a reduced temperature process for ZnO nanoparticle transistor integration on glass and foil substrates is presented.