Nano‐scale design of full adder and full subtractor using reversible logic based decoder circuit in quantum‐dot cellular automata

Abstract

AbstractThis paper presents a reversible nano‐scale decoder circuit. The decoder is designed by utilizing the new quantum‐dot cellular automata (QCA) format of the QCA1 gate. This QCA1 gate provides 34.25% less cell count with 54.37% less area than the best existing designs. Thus, the proposed QCA1 gate provides less area considering the best existing state‐of‐the‐art plans. The IBMQ‐based quantum realization of the QCA1 gate is also illustrated. The reversible full adder and subtractor circuits by employing the proposed decoder are likewise explored in this paper. A four‐input reversible OR‐gate is structured and concatenates with a decoder circuit to frame the circuit for full adder and subtractor. The energy dissipation by these QCA circuits is assessed to build up that QCA is an attractive option to CMOS for realizing reversible logic designs. The implemented results are compared with the truth table to ensure operational accuracy. The planned circuits can be utilized to structure reversible designs for nano‐communication.