Nano−Micro Characterization of Defects on Silicon Surfaces: An Industrial Perspective of Metrology Challenges

Abstract

The electronic device industry is known to have been driven since its early stages by a continuous technological effort of miniaturization because of the dual need of manufacturing cost reduction through integration and offers to the user market of smaller electronic applications, more efficient, versatile, and differentiable. Silicon wafer manufacturers have been forced to provide larger size silicon wafers. 300 mm diameter is nowadays covering more than 50% of the total market, with dimension and density of residual defects moving from micrometers to nanometers, from ppt to ppq, or even less. In this context, the proper choice of measurement technique and setup which can guarantee measurement reliability to detect a given defect and provide information of its distribution inside the wafer is mandatory. It has to cope the need to control material quality in a range more frequently close to the measurement detection limit and improve the associated manufacturing process capabilities. Herein, a few examples in the area of crystallographic/morphological defects and chemical impurities on silicon wafers are proposed, reviewing the defect analysis approach inside a manufacturing environment. The discussion also involves the final product certification data reporting which tends to convey in a very synthetic format the whole measurement and control process.