有机场效应晶体管导电机制及其稳定性研究

Abstract

The research of pentacene thin-film transistors (TFTs) and pentacene single crystal has been the research focus recently. In this paper, we have performed both experimental and theoretical studies for the influence of morphology of the first pentacene layer on the electronic properties of TFTs. We proposed a two-dimensional grain boundary model to interpret the relationship of the mobility as well as threshold voltage shift under gate bias-stress and the first-layered grain size. We obtained several meaningful parameters, such as mobility in single grain, trap density in grain boundary and the height of potential barrier. This is meaningful to optimize the performance of organic thin-film transistors. Meanwhile, we raised a new strategy to prepare pentacene single crystal, which starts from pentacene monolayer film and the process can be defined as two step growth of high quality, large pentacene single crystals. We systematically studied the molecular dynamics in this process, which may make essential preparation for device fabrication in the future.