Abstract
AbstractThis paper proposes to use a multiple‐valued (p‐valued) input, 2‐valued output logical element ((p, 2)‐logical element) for the construction of a 2‐valued ULM (Universal Logic Module). The (p, 2)‐logical element can conveniently be programmed to work as an expected 2‐valued logical function by appropriately selecting two input values among p values. The (p, 2)‐logical element as a ULM also has some preferable points such that the interconnections between ULM's can be decreased in VLSI, compared with the ULM in usual 2‐valued logic.
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