Multiplier-Free Parallel Fixed-Point Adaptive Equalizer for Real-Time Digital Coherent Communication

Abstract

Multiplier-free adaptive equalizers are significant for improving utilization, reducing costs, and ensuring robustness in real-time hardware implementation. In this letter, we demonstrate that using only one bit shift and one XOR operation to replace a real multiplier is a feasible and low-complexity way to obtain a multiplier-free parallel fixed-point adaptive equalizer (PFAEQ). The performances of the multiplier-free PFAEQ (MF-PFAEQ) are verified by a 112 Gbits/s polarization multiplexing quadrature phase shift keying (PM-QPSK) back-to-back experiment. It can be found that, under different parallels and different bit width of signals, MF-PFAEQ shows similar performances to traditional PFAEQ. Besides, in some cases, compared with the traditional PFAEQ, MF-PFAEQ also shows the similar convergent speed. In addition, according to the Quartus 15.0 synthesis, compared to traditional PFAEQ, the logic utilization and total registers of MF-PFAEQ reduce by 51.8% and 45.2%, respectively. This study is novel in using rather less shift operations to obtain a multiplier-free adaptive equalizer.