Multiple Error Self Checking-Repairing Fault Tolerant Adder-Multiplier

Abstract

Human action has its own limits. In some critical applications immediate action is required like defense application, space related, medical instruments or any safety application where fault tolerant systems are essential. This paper describes a new approach of full adder (FA) to accomplish fault-tolerant adder designs, which are more efficient than the conventional approaches, in distinct characteristic against many errors. This design covers self- checking and self-repairing FA to achieve multiple error detection and correction capability of all multiple permanent & transient errors. These adders require lower area overhead, less power consumption compared to the fault-tolerant methods implemented earlier. Area overhead analysis shows that the Lizard method consist of 75% of area overhead, Partial Triple Modular Redundancy (PTMR) consist an area overhead of 61% whereas the proposed adder is 100% free from area overhead. Self-checking $FA$, designed for carry select adder (CSA), consumes 15% less area compared to the previously used self-checking CSA approach. Area overhead of the proposed adder is 25% less, Power delay product of 4 bit fault tolerant multiplier is 92% less compared to Triple Modular Redundancy (TMR) method.