Abstract
Power and ground distribution network noise produced during SLEEP to ACTIVE mode transitions is an important reliability concern in multi-threshold CMOS (MTCMOS) circuits. Different multi-phase sleep signal slew rate modulation techniques for mode transition noise mitigation are investigated in this paper. A triple-phase sleep signal slew rate modulation technique with a novel digital sleep signal generator is proposed. Various important design metrics of different MTCMOS circuits are evaluated under an equal-noise constraint. The proposed digital triple-phase sleep signal slew rate modulation technique increases the overall quality by up to 9.15x and enhances the tolerance to process parameter fluctuations by up to 18x as compared to alternative sleep signal slew rate modulated MTCMOS circuits in a UMC 80nm CMOS technology.
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