Abstract
The ideas behind Silica Pithecus, a program for verifying synchronous digital MOS VLSI circuits, are described. Silica Pithecus accepts the schematic of an MOS VLSI circuit, declarations of the logical relationships between the input signals, and a specification of the intended digital behavior of the circuit. If the circuit fails to meet its specification, Silica Pithecus returns to the designer the reason it fails to do so. Unlike previous verification systems, which used digital models of MOS components, Silica Pithecus employs a realistic electrical model. It operates hierarchically, interactively, and incrementally. The key idea is to generate and use constraints for verification. Constraints are predicates that restrict the input signals a circuit accepts. Employing explicit constraints has many benefits. First, they enable hierarchical verification, which allows large circuits to be verified. Second, errors can be pinpointed and explained to the designer. Third, all constraints (at the electrical level) can be algorithmically and automatically generated. >
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