A Quadro Coding Technique to Reduce Self Transitions in VLSI Interconnects

Abstract

In a digital CMOS VLSI circuit, a large number of logic gates are interconnected with each other which together perform a logical operation with given input signal. When an input signal changes from 0 1 or vice-versa, this change will propagate through the circuit and results in power dissipation in the circuit. This power dissipation is majorly due to dynamic power dissipation in charging and discharging of the capacitive load of CMOS circuits. Reducing power dissipation in CMOS VLSI circuits is becoming a major area of focus of researchers recently as power is one of the constraints with digital circuits. In this paper, a Quadro coding technique for reducing dynamic power dissipation is proposed by reduction in switching activity of self transitions. In this method, the applied input data is coded in four different ways and the coding resulting in maximum reduction in transition activity is selected. Through this coding scheme the average transition activity is reduced by approximately 36% for 8-bit wide data bus, 23% for 16-bit wide data bus, 15% for 32-bit wide data bus. The coding technique gives better results for shorter bus width.