Abstract

Floating gate transistor is the fundamental building block of nonvolatile flash memory, which is one of the most widely used memory gadgets in modern micro and nano electronic applications. Recently there has been a surge of interest to introduce a new generation of memory devices using graphene nanotechnology. In this article, we present a new floating gate transistor (FGT) design based on multilayer graphene nanoribbon (MLGNR) and carbon nanotube (CNT). In the proposed FGT, a MLGNR structure would be used as the channel of the field effect transistor (FET) and a layer of CNTs would be used as the floating gate. We have performed an analysis of the programming and erasing mechanism in the floating gate and its dependence on the applied control gate voltages. Based on our analysis we have observed that proposed graphene based floating gate transistor could be operated at a low voltage compared to conventional silicon based floating gate devices. We have presented detail analysis of the operation and the programming and erasing processes of the proposed FGT; the dependency of the programming and erasing current density on different parameters; and the impact of scaling the thicknesses of the control and tunneling oxides. To perform these analyses we have developed equivalent models for device capacitances.

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