Abstract
A multidisciplinary placement optimization methodology for heat generating electronic components on a printed circuit board (PCB) subjected to forced convection in an enclosure is presented. In this methodology, thermal, electrical, and placement criteria involving junction temperature, wiring density, line length for high frequency signals, and critical component location are optimized simultaneously using the genetic algorithm. A board-level thermal performance prediction methodology based on channel flow forced convection boundary conditions is developed. The methodology consists of a combination of artificial neural networks (ANNs) and a superposition method that is able to predict PCB surface and component junction temperatures in a much shorter calculation time than the existing numerical methods. Three ANNs are used for predicting temperature rise at the PCB surface caused by a single heat source at an arbitrary location on the board, while temperature rise due to multiple heat sources is calculated using a superposition method. Compact thermal models are used for the electronic components thermal modeling. Using this optimization methodology, large calculation time reduction is achieved without losing accuracy. To demonstrate its capabilities, the present methodology is applied to a test case involving multiple heat generating component placement optimization on a PCB.
Published Version
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