Multicore reconfiguration platform an alternative to RAMPSoC

Abstract

The current state of the art in processor performance improvement is multicore-processor systems. These systems offer a number of homogeneous and static processor cores for the parallel distribution of computational tasks. A novel idea in this research field is introduced by the Runtime Adaptive Multi-Processor System-on- Chip (RAMPSoC) approach. It uses a dynamic and partial reconfigurable system to offer a heterogeneous multicore-processor system. It is runtime adaptable to applications needs and provides a high degree of freedom for system design and task distribution. The continuation of this idea is the Multicore Reconfiguration Platform (MRP) presented in this paper. Its fine grained reconfiguration framework offers a higher degree of freedom and achieves a better FPGA space exploitation, reduced power consumption and a more precise adaption to application requirements.