Monte Carlo simulations of InGaAs nano-MOSFETs

Abstract

The potential performance of sub-50 nm n-type implant free III-V MOSFETs with an In 0.75Ga 0.25As channel is studied using Monte Carlo (MC) device simulations. The simulated I D − V G characteristics of the In 0.75Ga 0.25As implant free MOSFETs are compared with equivalent In 0.3Ga 0.7As implant free MOSFETs and with a state-of-the-art silicon CMOS transistors. The study is based on careful calibration of the MC simulator against experimental data obtained from a δ-doped In 0.52Ga 0.48As/ In 0.53Ga 0.47As/In 0. 75Ga 0.25As heterostructure with a high- κ gate dielectric. At 0.8 V supply voltage, the 30 nm gate length In 0.75Ga 0.25As implant free III-V MOSFET delivers a drive current of 1730 μA/ μm as compared to the 1550 μA/ μm obtained in the equivalent In 0.3Ga 0.7As implant free MOSFET. When this high indium channel transistor is scaled to 20 and 15 nm gate lengths the drive current at 0.8 V supply voltage increases to 2465 and 2745 μA/ μm, respectively, making it a good candidate for high performance, low power digital applications at the 22 nm technology generation and beyond.