Monolithic array of 32 SPAD pixels for single-photon imaging at high frame rates

Abstract

We present a single-chip monolithic array of 32 Single-Photon Avalanche Diodes (SPAD) and associated electronics for imaging at high frame rates and high sensitivity. Photodetectors, front-end circuitry and control electronics used to manage the array are monolithically integrated on the same chip in a standard 0.35 μm CMOS high-voltage technology. The array is composed of 32 “smart” pixels working in photon counting mode and functioning in a parallel fashion. Every cell comprises of an integrated SPAD photodetector, a novel quenching circuit named as Variable Load Quenching Circuit (VLQC), counting electronics and a buffer memory. Proper ancillary electronics that perform the arbitration of photon counts between two consecutive frames is integrated as well. Thanks to the presence of in-pixel memory registers, the inter-frame dead time between subsequent frames is limited to few nanoseconds. Since integration and download are performed simultaneously and the array can be addressed like a standard digital memory, the achievable maximum frame rate is very high in the order of hundreds of thousands of frame/s.