Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density

Abstract

Carbon nanotube field effect transistor (CN-MOSFET) is attractive for the realization of future monolithic three-dimensional (M3D) memory circuits with ultra-high integration density, capacity, efficiency, and speed. However, the yield of each vertically-stacked active layer can be significantly degraded by the presence of metallic carbon nanotubes (m-CNs) caused by process imperfections. The potential integration density benefits of M3D circuits also may not be fully realized by the large area skews between different layers within standard cells. In this paper, ultra-high density and robust M3D static random-access memory (SRAM) cells are proposed for tolerance to the removal of m-CNs. By minimizing the skew and area of each device layer, the 16Kibit memory arrays with the proposed SRAM cells enhance the integration density by up to 82.92% as compared to the carbon-based traditional 2D and previously published M3D memory arrays. While achieving high functional yield and maintaining robust read/write operations, the proposed SRAM circuits enhance the overall electrical quality by up to 27.41x as compared to the alternative 2D and M3D memory arrays.