Abstract

Modified signed-digit (MSD) arithmetic can be efficiently performed by using two-step symbolic substitution (SS) for carry-free addition and borrow-free subtraction, where the to-be-added pair of numbers is first mapped into an intermediate pair such that the addition of the latter pair will prohibit carry propagation. Kozaitis1 presented the addition rules for a higherorder (two-bit) SS scheme allowing four bits to be processed at the same time. However, this technique depends on the length of the bit string, thereby producing an unnecessary constraint on the computation speed for operations involving long operands. To incorporate more information in fewer digits and at the same time perform arithmetic operations independent of the length of the bit strings, in this paper we study the higher-order SS technique employing MSD quaternary arithmetic. The necessary SS rules for both addition and subtraction using the proposed technique have been derived by taking into consideration a pair of reference bits from the next-lower-order bit position. Finally, the performances of the higher-order MSD binary, trinary, and quaternary arithmetic with the optical SS technique are compared.

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