Modern C++17 data pre-processing HLS Datflow Template Library

Abstract

Developing and implementing algorithms for detector read-out using FPGAs is traditionally done by using a hardware description language like VHDL, Verilog, or System Verilog. In the proposed approach here, we discuss an alternative way using higher level languages like the Intel HLS Compiler. Intel HLS supports C++17 standard and is ideal to apply methods from Modern C++ to implement complex algorithms more easily. In this work, we have developed a dataflow template library. This enables a shorter development time for increasingly complex algorithm requirements, which is also important for next-generation experiments in the future.