Modelling the turn-off characteristics of the base resistance controlled thyristor (BRT)

Abstract

An analytical model is described for the turn-off mechanism in the BRT. The assumptions which form the basis of the model are drawn from the results of two-dimensional numerical simulations of the turn-off process. It is shown that the device turns off when all the charge from the P-base is removed by the current flowing through the P-channel MOSFET into the diverter region. Based upon this, an expression has been derived for the time required for removal of the hole charge from the P-base (defined as the storage time). An expression for the maximum controllable current for the BRT (where it fails to turn off) has been derived by the condition that the storage time becomes infinite. The model predicts a decrease in the maximum controllable current with increase in the P-base sheet resistance and P MOS channel resistance. Based on the model, the maximum controllable current is shown to decrease with emitter width and increase, with emitter length. These predictions have been confirmed by experimental resistive load turn-off measurements on unit cell BRT devices. Consistent with the model, the measurements indicate no change in the controllable current with load voltages up to 500 V, indicating good RBSOA. The model has also been extended to calculate the holding current of the BRT and its dependence on device parameters.