Abstract
As capacitor-less DRAM cell appears to be an interesting candidate for future embedded memory generations, we paid particular attention to overall performance and scalability of the 1T-Bulk concept. We have analysed this architecture through our analytical model. Then we have fabricated devices and we have measured the influence of different technological parameters: floating body doping level, gate length and gate oxide thickness. The 1T-Bulk cell is demonstrated to be a promising candidate for eDRAM applications up to the 45 nm technological node.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
