Modelling of dual-port computing operations of a phase-change memory cell

Abstract

The general model of a phase-change memory (PCM) cell is very complex due to electrical property, thermal transfer and crystal growth. In this paper the general model is equivalent to an RC circuit, via which the dependence of the cell resistance on the number of pulses (Set or Reset) was investigated. Moreover, as for dual-port asynchronous operations of a pore-type PCM cell, a double-capacitor-based cell model was proposed. By simulation on the model we verified feasibility of the cell’s logic and arithmetic operations. In addition, the simulation results of addition and subtraction show that the resistance changes linearly with a short pulse sequence.