Abstract

Physical Unclonable Functions (PUFs) have emerged as a lightweight security primitive for resource constrained devices. However, conventional delay-based Physical Unclonable Functions (PUFs) are vulnerable to machine learning (ML) based modelling attacks. Although ML resistant PUF designs have been proposed, they often suffer from large overheads and are difficult to implement on FPGA. Lightweight ML resistant FPGA compatible designs have been proposed which make use of combined multi-PUF designs, incorporating a set of weak PUFs to obscure the challenge to a strong PUF in order to increase the difficulty of model building. In such designs any unreliability in the main PUF is amplified by unreliability in the masking PUFs. For this reason strong PUFs suitable for FPGA that can achieve high reliability, such as the Configurable Ring Oscillator (CRO) PUF, are a promising option. In this paper a mathematical model of the CRO PUF is presented. We show that models of traditional CRO PUFs can be trained to above 99% prediction rate using the Linear Regression and CMA-ES strategies. A proposed multi-PUF design based on the previously proposed arbiter MPUF is evaluated with the same methods. It is shown that even with challenge obfuscation the CRO PUF can be predicted with greater than 90% accuracy. It is shown that with the addition of a second XORed PUF the ML resistance can be increased further with a maximum prediction rate of 86%.

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