Lightweight Configurable Ring Oscillator PUF Based on RRAM/CMOS Hybrid Circuits

Yijun Cui,Chongyan Gu,Maire O'Neill,Weiqiang Liu,Chenghua Wang,Fabrizio Lombardi

doi:10.1109/ojnano.2020.3040787

Abstract

Physical unclonable function (PUF) is a lightweight security primitive for energy constrained digital systems. As an enhanced design of conventional ring oscillator (RO) PUFs, configurable ring oscillator (CRO) PUFs improve the uniqueness and reliability compared with the conventional RO PUF designs. In typical CRO PUF designs, multiplexers (MUXs) are utilized as configurable components. In this paper, a hybrid nano-scale CRO ( $hn$ -CRO) PUF is proposed. The configurable components of the proposed $hn$ -CRO PUF are implemented by RRAMs. The delay elements are based on CMOS inverters. Compared with traditional CRO PUF designs, the proposed $hn$ -CRO PUF is cost-efficient in terms of circuit density and gate per challenge response pair (CRP) bit. To validate the proposed $hn$ -CRO PUF, the Monte Carlo simulation results of a compact RRAM model under UMC 65 nm technology are presented. The results show that the proposed $hn$ -CRO PUF has a good uniqueness and low hardware consumption compared with the previous works.

Highlights

P UF is one of the most promising security primitives for resource constrained scenarios, e.g. the Internet of Things (IoT) applications
A typical configurable ring oscillator (CRO) Physical unclonable function (PUF) is composed of switching components and delay components, where the switching components provide the reconfigurability to the PUF structure when the design is completed and deployed
The results shows that the RC delay introduce by the RRAM in LowResistance State (LRS) mode helps to decrease the final frequency and this will simplify the design of counters

Summary

Introduction

P UF is one of the most promising security primitives for resource constrained scenarios, e.g. the Internet of Things (IoT) applications. Various PUF structures have been proposed and they can be classified to delay based PUFs and memory based PUFs. The most cited designs include RO PUFs , Arbiter PUFs and SRAM PUFs [1]. CRO PUF, as an improved design of the conventional RO PUF, aims to acquire a high uniqueness, reliability and lower cost. A typical CRO PUF is composed of switching components and delay components, where the switching components provide the reconfigurability to the PUF structure when the design is completed and deployed. The MUXs in [2]–[4] and the tristate gates in [5] act as the switching components and selects which delay unit is involved in the construction of the CRO PUF

Methods

Results

Conclusion