Abstract
This paper presents a model for the simulation of gate leakage currents within organic thin film transistors. These unintended currents act as loads within integrated electronic circuits and thereby can have a huge impact on its functionality. Simulation of these currents is important in order to design and manufacture high performance organic electronics circuits of high complexity. We show the influence of gate leakage currents on signals within a circuit. A model for electrical simulations is developed, which is based on defects within the dielectric layer. Only two new parameters need to be determined, they describe the size and amount of defects. The improvement of simulation by this model is verified by comparison of measurements and simulations.
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