Modelling and simulation of FinFET circuits with predictive technology models

Abstract

During analysis of complexities of the Metal Oxide Semiconductor Field Effect Transistors (MOSFET) technology to obtain the adequate gate control above the channel, FinFET technology founded on Double or Multiple gate (more than two gates) arrangement is improved technology alternative for auxiliary lessening the size of the MOSFET. In favor of double or dual gate MOSFET (DG MOSFET) the gate control above the channel that formed in between source and drain terminal efficiently. As a result the numerous short channel effects like sub-threshold swing, Drain Induced Barrier Lowering (DIBL-effect), gate leakage current, punch through etc. do not include growing of carrier concentration addicted to the channel. This paper is devoted to specific explanation on the subject of the DG MOSFET composition with its exacting kind termed the same as FinFET technology. FinFET technology has four modes such as shorted-gate (SG) mode, low power (LP) mode, independent-gate (IG) mode and hybrid IG/LP mode and performed the comparative analysis of stand-by leakage (when the circuit is idle), delay, total power consumption and noise of the circuit, using Cadence Virtuoso tool at 45 nm.