Modelling and optimisation of a dual‐control MHz‐level CLLC converter with minimised power losses in battery charging applications

Abstract

In this study, a novel ‘ f − φ ’ dual-control modulation is proposed for the MHz-level CLLC converters in battery charging applications. Phase shift between the primary and secondary switches is utilised as an additional control variable to effectively reduce the power losses, especially in light- and medium-load conditions. Compared to other state of the art, a more generalised theoretical model is developed to characterise the converter with higher accuracy based on extended harmonic approximation. Furthermore, a numerical algorithm is utilised to thoroughly examine the converter performance under various operating conditions and systematically search for the optimised design parameters under the proposed modulation scheme. The modelling and optimisation are verified by simulation on a 3.3 kW onboard charger design for electric vehicles, which shows an estimated efficiency enhancement between 1 and 4%. Finally, a laboratory prototype has been developed using gallium nitride semiconductor devices, at the resonant frequency of 1 MHz. The converter measured efficiencies are 96.4, 96.2 and 94% for the selected heavy, medium- and light-load conditions, respectively. This system would allow insights into the practical implementation and evaluation of utilising wide bandgap semiconductors to achieve both high power density and enhanced efficiency for emerging power electronic systems.