Modelling and Experimental Evaluation of Ideal Transformer Algorithm Interface for Power Hardware in the Loop Architecture

Abstract

Interface devices are crucial to achieving Power Hardware in the Loop (PHIL) configuration. It is the interface that separates PHIL implementation with its real counterpart. This inclusion of interface at power decoupling point has raised the concern of stability and accuracy among researchers. It is therefore essential to study the effect of interface if the PHIL system is to be entirely understood. Ideal Transformer Algorithm (ITA) is one of the widely used interfacing method for PHIL due to its implementation simplicity. Moreover, the existing models of ITA relies only on the theoretical model developed. This work constitutes the study and development of accurate mathematical model of individual interface devices in ITA. Further, this paper uses a frequency sweep approach to determine the responses from the actual system consisting of a Real Time Digital Simulator (RTDS). This experimentally obtained frequency response is then compared with model response to test the accuracy of the developed model. This paper therefore bridges the existing gap in interface model by experimentally verifying the developed model. The theoretical and experimental model are well within agreement to further the studies in PHIL.