Modeling small-signal response of GaN-based metal-insulator-semiconductor high electron mobility transistor gate stack in spill-over regime: Effect of barrier resistance and interface states

Abstract

We provide theoretical and simulation analysis of the small signal response of SiO2/AlGaN/GaN metal insulator semiconductor (MIS) capacitors from depletion to spill over region, where the AlGaN/SiO2 interface is accumulated with free electrons. A lumped element model of the gate stack, including the response of traps at the III-N/dielectric interface, is proposed and represented in terms of equivalent parallel capacitance, Cp, and conductance, Gp. Cp -voltage and Gp -voltage dependences are modelled taking into account bias dependent AlGaN barrier dynamic resistance Rbr and the effective channel resistance. In particular, in the spill-over region, the drop of Cp with the frequency increase can be explained even without taking into account the response of interface traps, solely by considering the intrinsic response of the gate stack (i.e., no trap effects) and the decrease of Rbr with the applied forward bias. Furthermore, we show the limitations of the conductance method for the evaluation of the density of interface traps, Dit, from the Gp/ω vs. angular frequency ω curves. A peak in Gp/ω vs. ω occurs even without traps, merely due to the intrinsic frequency response of gate stack. Moreover, the amplitude of the Gp/ω vs. ω peak saturates at high Dit, which can lead to underestimation of Dit. Understanding the complex interplay between the intrinsic gate stack response and the effect of interface traps is relevant for the development of normally on and normally off MIS high electron mobility transistors with stable threshold voltage.