Abstract
This paper analytically models the characteristics parameters of nano-scale junctionless double gate MOSFETs under quantum confinement, as junctionless transistors gain advantages over their junction based counterparts recently. The models explicitly show how the device parameters like silicon channel thickness, oxide thickness, channel length etc. affect the characteristic parameters like surface potential, threshold voltage etc. when quantum mechanical effects dominate. We also study the effect of temperature on electron populations on sub-band energy levels. Variable quasi Fermi energy level is considered in this paper to increase the accuracy of the proposed models. Threshold voltage roll-off and drain induced barrier lowering are also analyzed to increase the efficacy of the models. These analytical models, valid from accumulation to depletion regimes, are validated and verified with the data obtained from Schrodinger---Poisson solver model of Technology Computer Aided Design. Simplicity of the proposed models give easy way to understand, analyze, and design Double Gate Junctionless transistors comprehensively.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.