Modeling and Suppression of the Crosstalk Issue Considering the Influence of the Parasitic Parameters of SiC MOSFETs

Abstract

Due to the extremely fast switching speed of the SiC MOSFET, its crosstalk issue is more serious than that of the Si IGBT. Therefore, in order to ensure the reliability of the SiC MOSFET converters, the crosstalk problem must be solved firstly. Most of the existing crosstalk suppression methods are aimed at decreasing the crosstalk voltage introduced by the parasitic gate-drain capacitance (Miller capacitance), ignoring the influence of other parasitic parameters on the crosstalk voltage, such as the common source inductance, which may also lead to more serious reliability problems. Thus, this paper firstly establishes the mathematical model of the switching process of the SiC MOSFET half-bridge inverter. Then, the effects of various parasitic parameters (the gate-source capacitance, the gate-drain capacitance, the common source inductance, the gate inductance, the drain inductance) on the crosstalk voltage are analyzed and modeled in detail, which is verified by experiments. Based on the analyses and models, a novel crosstalk voltage suppression circuit is proposed, which can not only suppress the crosstalk caused by the gate-drain capacitance, but also solve the crosstalk issue considering the influence of other parasitic parameters, such as the common source inductance. Finally, a double pulse test platform is established to verify the effectiveness of the designed crosstalk suppression circuit under different voltage/current conditions.